1. Field of the Invention
The present invention relates to a negative hole structure, a method for forming the same, and an electron emission device for a flat panel display including the same. The invention relates more particularly to a negative hole structure having a protruded portion to secure resistance between electrodes and to prevent an arc between the electrodes, a method for forming the same, and an electron emission device for a flat panel display including the same.
2. Discussion of Related Art
Generally, a negative hole is formed by etching a dielectric layer that is interposed between conductive electrodes in order to prevent the conductive electrodes from short circuiting when high voltage is applied therebetween and to secure a predetermined resistance. The negative hole is formed in the dielectric layer as a simple medium of constant permittivity and has a straight, vertical profile or an inclined profile. Such a negative hole is generally used in a device having a microstructure electrode, particularly in a flat panel display, which usually has a slim shape.
A flat panel display can include a liquid crystal display (LCD), a plasma display panel (PDP), a vacuum fluorescent display (VFD), or an electron emission display, or the like. In the case of an electron emission display, an electron emission device is employed as an electron source and classified into a hot cathode type or a cold cathode type. The cold cathode type electron emission device can include a field emitter array (FEA), a surface conduction emitter (SCE), a metal insulator metal (MIM), a metal insulator semiconductor (MIS), or a ballistic electron surface emitter (BSE), or the like. Such an electron emission device can also be employed in the electron emission display, various backlights, an electron beam apparatus for lithography, etc. In an electron emission display, electrons are emitted from the electron emission region of an electron emission device, and the emitted electrons collide with a fluorescent layer to emit light in a display region.
A conventional electron emission device for a flat panel display is shown in FIG. 1. A cathode 12 is formed on a plate 11, and a dielectric layer 13 and a gate 16 are formed on the cathode 12. An electron emission source 18 is formed within the negative hole 13a, which is formed through the dielectric layer 13 and the gate 16. The negative hole 13a can have a straight, vertical profile or a straight, inclined profile.
The electron emission device with the negative hole 13a shown in FIG. 1 is created in the following manner. The cathode 12, the dielectric layer 13 and the gate 16 are in turn formed on the plate 11, and then the negative hole 13a is formed by a wet etching process or the like. Then, a carbon nano tube (CNT) is injected, developed, annealed and activated, thereby forming the electron emission source 18 within the negative hole 13a. However, a CNT paste contracts by 60% or more while being annealed. Where an inner wall is inclined, the CNT may not be effectively removed and is likely to remain on the inner wall of the negative hole 13a while being activated. The remaining CNT decreases the resistance between the cathode 12 and the gate 16, thereby causing an arc between the cathode 12 and the gate 16 and distorting an input signal.
To solve the foregoing problems, various methods have been proposed, in which the negative hole has an improved structure for preventing the short circuit between the electrodes.
One example is Korean Patent Publication No. 1998-022876, issued to Orion Electronics, Inc., which discloses a field emission display (FED) having a cathode structure with a “V”-shaped gate to apply a strong electric field. An electron emission source (emitter) is a metal tip instead of the CNT. Also, the electron emission source is a gate and not a dielectric layer, and has a downward curved structure.
Another example is Korean Patent Publication No. 2003-0080767, issued to Samsung SDI, Inc., which discloses a method of forming a negative hole having a vertical profile in order to enlarge the superficial area of a cathode and to fabricate an electron emission device for high resolution and high brightness. In this case, two or more multiple-layered dielectric layers are formed and etched at different rates. The conventional dielectric layers are etched only to make an inner wall of the negative hole have a vertical profile without a protruded structure. Prevention of arc generation and signal distortion by securing resistance between the cathode and the gate is not a stated objective or advantage of this method.
Yet another example of negative hole structure is U.S. Pat. No. 6,204,597, issued to Motorola, Inc., which discloses a negative hole that focuses an electron beam emitted from an emitter. The negative hole is formed in a dielectric layer having two dielectric materials having different pernittivities (e.g., refer to FIG. 1).